
4-38 PCI Host Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
Register: 0x14
Diagnostic Read/Write Address
Read/Write
The Diagnostic Read/Write Address register specifies a Dword location
on the internal bus. The address increments by a Dword whenever the
host system accesses the Diagnostic Read/Write Address register. This
register is only accessible through PCI I/O Space and returns
0xFFFFFFFF if read through PCI Memory Space. The host can enable
write access to this register by writing the correct Write I/O Key to the
Write Sequence register and setting bit 4, the Diagnostic Write Enable
bit, of the Host Diagnostic register. A write of any value other than the
correct Write I/O Key to the Write Sequence register disables write
access to this register.
Diagnostic Read/Write Address [31:0]
This register holds the address that the Diagnostic
Read/Write Data register writes data to or reads data from.
Register: 0x30
Host Interrupt Status
Read/Write
The Host Interrupt Status register provides read only interrupt status
information to the PCI Host. A write to this register of any value clears
the associated System Doorbell interrupt.
IOP Doorbell Status 31
The LSISAS1064 sets this bit when the IOP receives a
message from the system doorbell but has yet to process
it. The IOP processes the System Doorbell message then
clears the corresponding system request interrupt.
31 24 23 16 15 8 7 0
Diagnostic Read/Write Address
00000000000000000000000000000000
31 24 23 16 15 8 7 0
Host Interrupt Status
0 x x x x x x x x x x x x x x x x x x x x x x x x x x x0x x0
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